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  ?2001 fairchild semiconductor corporation hgtd3n60a4s, HGT1S3N60A4S, hgtp3n60a4 rev. b file number 4825 hgtd3n60a4s, HGT1S3N60A4S, hgtp3n60a4 600v, smps series n-channel igbt the hgtd3n60a4s, HGT1S3N60A4S and the hgtp3n60a4 are mos gated high voltage switching devices combining the best features of mosfets and bipolar transistors. these devices have the high input impedance of a mosfet and the low on-state conduction loss of a bipolar transistor. the much lower on-state voltage drop varies only moderately between 25 o c and 150 o c. this igbt is ideal for many high voltage switching applications operating at high frequencies where low conduction losses are essential. this device has been optimized for high frequency switch mode power supplies . formerly developmental type ta49327. symbol features ? >100khz operation at 390v, 3a  200khz operation at 390v, 2.5a  600v switching soa capability  typical fall time. . . . . . . . . . . . . . . . . 70ns at t j = 125 o c 12mj e as capability  low conduction loss  temperature compensating saber? model www.fairchild.com  related literature - tb334 ?guidelines for soldering surface mount components to pc boards? packaging jedec to-252aa jedec to-263ab jedec to-220ab ordering information part number package brand hgtd3n60a4s to-252aa 3n60a4 HGT1S3N60A4S to-263ab 3n60a4 hgtp3n60a4 to-220ab 3n60a4 note: when ordering, use the entire part number. add the suffix 9a to obtain the to-252aa or the to- 263ab in tape and reel, i.e. HGT1S3N60A4S9a c e g g e collector (flange) collector (flange) e g c g e collector (flange) fairchild corporation igbt product is covered by one or more of the following u.s. patents 4,364,073 4,417,385 4,430,792 4,443,931 4,466,176 4,516,143 4,532,534 4,587,713 4,598,461 4,605,948 4,620,211 4,631,564 4,639,754 4,639,762 4,641,162 4,644,637 4,682,195 4,684,413 4,694,313 4,717,679 4,743,952 4,783,690 4,794,432 4,801,986 4,803,533 4,809,045 4,809,047 4,810,665 4,823,176 4,837,606 4,860,080 4,883,767 4,888,627 4,890,143 4,901,127 4,904,609 4,933,740 4,963,951 4,969,027 data sheet january 2000
?2001 fairchild semiconductor corporation hgtd3n60a4s, HGT1S3N60A4S, hgtp3n60a4 rev. b absolute maximum ratings t c = 25 o c, unless otherwise specified all types units collector to emitter voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . bv ces 600 v collector current continuous at t c = 25 o c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i c25 17 a at t c = 110 o c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i c110 8a collector current pulsed (note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i cm 40 a gate to emitter voltage continuous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v ges 20 v gate to emitter voltage pulsed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v gem 30 v switching safe operating area at t j = 150 o c, figure 2 . . . . . . . . . . . . . . . . . . . . . . . . ssoa 15a at 600v single pulse avalanche energy at t c = 25 o c. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . e as 12mj at 3a power dissipation total at t c = 25 o c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . p d 70 w power dissipation derating t c > 25 o c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.56 w/ o c operating and storage junction temperature range . . . . . . . . . . . . . . . . . . . . . . . t j , t stg -55 to 150 o c maximum lead temperature for soldering leads at 0.063in (1.6mm) from case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . t l package body for 10s, see tech brief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . t pkg 300 260 o c o c caution: stresses above those listed in ?absolute maximum ratings? may cause permanent damage to the device. this is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. note: 1. pulse width limited by maximum junction temperature. electrical specifications t j = 25 o c, unless otherwise specified parameter symbol test conditions min typ max units collector to emitter breakdown voltage bv ces i c = 250 a, v ge = 0v 600 - - v emitter to collector breakdown voltage bv ecs i c = 10ma, v ge = 0v 15 - - v collector to emitter leakage current i ces v ce = 600v t j = 25 o c - - 250 a t j = 125 o c--2.0ma collector to emitter saturation voltage v ce(sat) i c = 3a, v ge = 15v t j = 25 o c-2.02.7v t j = 125 o c-1.62.2v gate to emitter threshold voltage v ge(th) i c = 250 a, v ce = 600v 4.5 6.1 7.0 v gate to emitter leakage current i ges v ge = 20v - - 250 na switching soa ssoa t j = 150 o c, r g = 50 ?, v ge = 15v l = 200 h, v ce = 600v 15 - - a pulsed avalanche energy e as i ce = 3a, l = 2.7mh 12 - - mj gate to emitter plateau voltage v gep i c = 3a, v ce = 300v - 8.8 - v on-state gate charge q g(on) i c = 3a, v ce = 300v v ge = 15v - 21 25 nc v ge = 20v - 26 32 nc current turn-on delay time t d(on)i igbt and diode at t j = 25 o c i ce = 3a v ce = 390v v ge = 15v r g = 50 ? l = 1mh test circuit - figure 20 -6 - ns current rise time t ri -11 - ns current turn-off delay time t d(off)i -73 - ns current fall time t fi -47 - ns turn-on energy (note 3) e on1 -37 - j turn-on energy (note 3) e on2 -5570 j turn-off energy (note 2) e off -2535 j hgtd3n60a4s, HGT1S3N60A4S, hgtp3n60a4
?2001 fairchild semiconductor corporation hgtd3n60a4s, HGT1S3N60A4S, hgtp3n60a4 rev. b current turn-on delay time t d(on)i igbt and diode at t j = 125 o c i ce = 3a v ce = 390v v ge = 15v r g = 50 ? l = 1mh test circuit - figure 20 -5.58 ns current rise time t ri -1215ns current turn-off delay time t d(off)i - 110 165 ns current fall time t fi - 70 100 ns turn-on energy (note 3) e on1 -37 - j turn-on energy (note 3) e on2 - 90 100 j turn-off energy (note 2) e off -5080 j thermal resistance junction to case r jc --1.8 o c/w notes: 2. turn-off energy loss (e off ) is defined as the integral of the instantaneous power loss starting at the trailing edge of the input pulse and ending at the point where the collector current equals zero (i ce = 0a). all devices were tested per je dec standard no. 24-1 method for measurement of power device turn-off switching loss. this test method p roduces the true total turn-off energy loss. 3. values for two turn-on loss condi tions are shown for the convenience of the circuit desi gner. e on1 is the turn-on loss of the igbt only. e on2 is the turn-on loss when a typical diode is used in the test circuit and the diode is at the same t j as the igbt. the diode type is specified in figure 20. typical performance curves unless otherwise specified figure 1. dc collector current vs case temperature figure 2. minimum switching safe operating area figure 3. operating frequency vs collector to emitter current figure 4. short circuit withstand time electrical specifications t j = 25 o c, unless otherwise specified (continued) parameter symbol test conditions min typ max units t c , case temperature ( o c) i ce , dc collector current (a) 50 4 0 16 8 12 25 75 100 125 150 20 v ge = 15v v ce , collector to emitter voltage (v) 700 12 0 i ce , collector to emitter current (a) 4 300 400 200 100 500 600 0 16 20 8 t j = 150 o c, r g = 50 ? , v ge = 15v, l = 200 h f max , operating frequency (khz) 1 i ce , collector to emitter current (a) 50 300 6 23 600 100 5 4 200 f max1 = 0.05 / (t d(off)i + t d(on)i ) r ?jc = 1.8 o c/w, see notes p c = conduction dissipation (duty factor = 50%) f max2 = (p d - p c ) / (e on2 + e off ) t c v ge 15v 75 o c t j = 125 o c, r g = 50 ? , l = 1mh, v ce = 390v v ge , gate to emitter voltage (v) i sc , peak short circuit current (a) t sc , short circuit withstand time ( s) 10 11 12 15 4 6 14 0 24 40 56 18 13 14 8 10 12 16 8 16 32 48 20 64 v ce = 390v, r g = 50 ? , t j = 125 o c t sc i sc hgtd3n60a4s, HGT1S3N60A4S, hgtp3n60a4
?2001 fairchild semiconductor corporation hgtd3n60a4s, HGT1S3N60A4S, hgtp3n60a4 rev. b figure 5. collector to emitter on-state voltage figure 6. collector to emitter on-state voltage figure 7. turn-on energy loss vs collector to emitter current figure 8. turn-off energy loss vs collector to emitter current figure 9. turn-on delay time vs collector to emitter current figure 10. turn-on rise time vs collector to emitter current typical performance curves unless otherwise specified (continued) 023 v ce , collector to emitter voltage (v) i ce , collector to emitter current (a) 0 4 8 45 16 12 20 1 t j = 25 o c t j = 125 o c t j = 150 o c pulse duration = 250 s duty cycle < 0.5%, v ge = 12v i ce , collector to emitter current (a) v ce , collector to emitter voltage (v) 0 4 8 16 12 20 0234 1 duty cycle < 0.5%, v ge = 15v pulse duration = 250 s t j = 25 o c t j = 150 o c t j = 125 o c e on2 , turn-on energy loss ( j) 160 80 i ce , collector to emitter current (a) 120 40 200 3 2456 0 1 240 t j = 25 o c, v ge = 12v, v ge = 15v t j = 125 o c, v ge = 12v, v ge = 15v r g = 50 ? , l = 1mh, v ce = 390v 120 e off , turn-off energy loss ( j) 0 20 80 40 100 140 60 3 2456 1 i ce , collector to emitter current (a) t j = 25 o c, v ge = 12v or 15v t j = 125 o c, v ge = 12v or 15v r g = 50 ? , l = 1mh, v ce = 390v i ce , collector to emitter current (a) t d(on)i , turn-on delay time (ns) 0 12 16 2 1 3456 8 4 t j = 25 o c, t j = 125 o c, v ge = 15v r g = 50 ? , l = 1mh, v ce = 390v t j = 25 o c, t j = 125 o c, v ge = 12v 1 i ce , collector to emitter current (a) t ri , rise time (ns) 4 8 20 16 12 24 32 28 3 2456 1 t j = 25 o c or t j = 125 o c, v ge = 15v r g = 50 ? , l = 1mh, v ce = 390v t j = 25 o c or t j = 125 o c, v ge = 12v hgtd3n60a4s, HGT1S3N60A4S, hgtp3n60a4
?2001 fairchild semiconductor corporation hgtd3n60a4s, HGT1S3N60A4S, hgtp3n60a4 rev. b figure 11. turn-off delay time vs collector to emitter current figure 12. fall time vs collector to emitter current figure 13. transfer characteristic figure 14. gate charge waveforms figure 15. total switching loss vs case temperature figure 16. total switching loss vs gate resistance typical performance curves unless otherwise specified (continued) 64 48 56 i ce , collector to emitter current (a) t d(off)i , turn-off delay time (ns) 112 80 96 72 2 13456 88 104 r g = 50 ? , l = 1mh, v ce = 390v v ge = 12v, t j = 25 o c v ge = 15v, t j = 25 o c v ge = 15v, t j = 125 o c v ge = 12v, t j = 125 o c i ce , collector to emitter current (a) t fi , fall time (ns) 48 40 64 80 56 72 88 96 2 1 3456 t j = 125 o c, v ge = 12v or 15v t j = 25 o c, v ge = 12v or 15v r g = 50 ? , l = 1mh, v ce = 390v i ce , collector to emitter current (a) 0 8 12 46810 14 v ge , gate to emitter voltage (v) 12 16 20 4 pulse duration = 250 s duty cycle < 0.5%, v ce = 10v t j = 125 o c t j = -55 o c t j = 25 o c v ge , gate to emitter voltage (v) q g , gate charge (nc) 2 14 0 4 10 6 8 12 16 4 8 12 16 24 20 28 0 v ce = 600v v ce = 400v v ce = 200v i g(ref) = 1ma, r l = 100 ? , t j = 25 o c 0 50 100 50 75 100 t c , case temperature ( o c) 150 125 25 150 250 200 e total , total switching energy loss ( j) r g = 50 ? , l = 1mh, v ce = 390v, v ge = 15v i ce = 4.5a i ce = 3a i ce = 1.5a e total = e on2 + e off 30 10 100 r g , gate resistance ( ? ) 100 31000 e total , total switching energy loss ( j) 1000 i ce = 4.5a i ce = 3a i ce = 1.5a t j = 125 o c, l = 1mh, v ce = 390v, v ge = 15v e total = e on2 + e off hgtd3n60a4s, HGT1S3N60A4S, hgtp3n60a4
?2001 fairchild semiconductor corporation hgtd3n60a4s, HGT1S3N60A4S, hgtp3n60a4 rev. b figure 17. capacitance vs collector to emitter voltage figure 18. collector to emitter on-state voltage vs gate to emitter voltage figure 19. igbt normalized transient thermal response, junction to case typical performance curves unless otherwise specified (continued) v ce , collector to emitter voltage (v) c, capacitance (pf) 0 20406080100 0 200 400 500 700 300 600 100 frequency = 1mhz c ies c oes c res v ge , gate to emitter voltage (v) 8 2.0 10 12 2.1 2.4 2.2 14 16 2.6 2.7 v ce , collector to emitter voltage (v) 2.3 2.5 duty cycle < 0.5%, t j = 25 o c pulse duration = 250 s, i ce = 4.5a i ce = 1.5a i ce = 3a t 1 , rectangular pulse duration (s) z qjc , normalized thermal response 10 -2 10 -1 10 0 10 -5 10 -3 10 -2 10 -1 10 0 10 -4 t 1 t 2 p d single pulse 0.1 0.2 0.5 0.05 0.01 0.02 duty factor, d = t 1 / t 2 peak t j = (p d x z qjc x r qjc ) + t c hgtd3n60a4s, HGT1S3N60A4S, hgtp3n60a4
?2001 fairchild semiconductor corporation hgtd3n60a4s, HGT1S3N60A4S, hgtp3n60a4 rev. b handling precautions for igbts insulated gate bipolar transistors are susceptible to gate- insulation damage by the electro static discha rge of energy through the devices. when handling these devices, care should be exercised to assure that the static charge built in the handler?s body capacitance is not discharged through the device. with proper handling and application procedures, however, igbts are currently being extensively used in production by numerous equipment manufacturers in military, industrial and consumer applications, with virtually no damage problems due to electrostatic discharge. igbts can be handled safely if the following basic precauti ons are taken: 1. prior to assembly into a circuit, all leads should be kept shorted together either by the use of metal shorting springs or by the insertion into conductive material such as ?eccosorbd? ld26? or equivalent. 2. when devices are removed by hand from their carriers, the hand being used should be grounded by any suitable means - for example, with a metallic wristband. 3. tips of soldering irons should be grounded. 4. devices should never be inserted into or removed from circuits with power on. 5. gate voltage rating - never exceed the gate-voltage rating of v gem . exceeding the rated v ge can result in permanent damage to the oxide layer in the gate region. 6. gate termination - the gates of these devices are essentially capacitors. circuits that leave the gate open- circuited or floating should be avoided. these conditions can result in turn-on of the device due to voltage buildup on the input capacitor due to leakage currents or pickup. 7. gate protection - these devices do not have an internal monolithic zener diode from gate to emitter. if gate protection is required an external zener is recommended. operating frequency information operating frequency information for a typical device (figure 3) is presented as a guide for estimating device performance for a specific application. other typical frequency vs collector current (i ce ) plots are possible using the information shown for a typical unit in figures 6, 7, 8, 9 and 11. the operating frequency plot (figure 3) of a typical device shows f max1 or f max2 ; whichever is smaller at each point. the information is based on measurements of a typical device and is bounded by the maximum rated junction temperature. f max1 is defined by f max1 = 0.05/(t d(off)i + t d(on)i ). deadtime (the denominator) has been arbitrarily held to 10% of the on-state time for a 50% duty factor. other definitions are possible. t d(off)i and t d(on)i are defined in figure 21. device turn-off delay can establish an additional frequency limiting condition for an application other than t jm . f max2 is defined by f max2 = (p d - p c )/(e off + e on2 ). the allowable dissipation (p d ) is defined by p d = (t jm - t c )/r jc . the sum of device switching and conduction losses must not exceed p d . a 50% duty factor was used (figure 3) and the conduction losses (p c ) are approximated by p c = (v ce x i ce )/2. e on2 and e off are defined in the switching waveforms shown in figure 21. e on2 is the integral of the instantaneous power loss (i ce x v ce ) during turn-on and e off is the integral of the instant aneous power loss (i ce x v ce ) during turn-off. all tail losses are included in the calculation for e off ; i.e., the collector current equals zero (i ce = 0). test circuit and waveforms figure 20. inductive switching test circui t figure 21. switching test waveforms r g = 50 ? l = 1mh v dd = 390v + - hgtp3n60a4d dut diode ta49369 t fi t d(off)i t ri t d(on)i 10% 90% 10% 90% v ce i ce v ge e off e on2 i ce hgtd3n60a4s, HGT1S3N60A4S, hgtp3n60a4


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